1. Field of the Invention
The present invention relates to a serial bus control apparatus for controlling and performing a reservation of a transmission bandwidth and a transmission channel using the IEEE 1394 serial bus etc.
2. Description of the Prior Art
In recent years, two or more AVC equipment such as digital VCRs and personal computers are connected by using the ISO IEC 13213 conforming serial bus such as IEEE 1394 serial buses, and a bandwidth secured transmission (isochronous transmission) of the video and the audio data is performed.
FIG. 10 shows an example of the conventional method for performing a dubbing by a serial bus control apparatus when two digital VCRs generally used are connected each other by the IEEE 1394 serial bus. The isochronous transmission which uses IEEE 1394 is described in detail in the standard book "IEEE Standard for a High Performance Serial BUS" of IEEE Standard 1394--1995. One example of the conventional serial bus control apparatus above mentioned is described with reference to the drawing. FIG. 10 shows the appearance of the dubbing in a digital VCR where a conventional serial bus control apparatus is installed. As shown in FIG. 10, 1 denotes a first digital VCR, 2 denotes a second digital VCR, both VCRs are the nodes of the IEEE 1394 serial buses. 5 denotes the IEEE 1394 serial bus which connects both digital VCR 1 and 2 each other. When both nodes are connected each other by using IEEE 1394, an identification number, which is called physical-ID, is automatically allotted to each node respectively. In this case, the allotted ID number for the node of the first digital VCR is physical_ID=0 and the allotted ID number for the node of the second digital VCR is physical_ID=1. Data for which real time processing is required, such as video data or audio data etc., is transmitted in IEEE 1394 with a transmission system which secures the transmission band and the transmission channel, which is usually called isochronous transmission.
FIG. 13 shows the appearance of the isochronous transmission. In the isochronous transmission, a node which is called a cycle muster (hereinafter, referred to as CM) performs a broadcast transmission of a cycle start packet 11 to the entire bus at 125 .mu.sec cycles.
When the broadcast transmission of the cycle start packet is performed, the isochronous packet can be ready to transmit. At this time, a serial bus control apparatus which is called an isochronous resource manager (hereinafter, referred to as IRM) exists on the bus. To performs the isochronous transmission, it is necessary to declare securing the isochronous resource by using a register for securing the bandwidth (BANDWIDTH_AVAILABLE register) and a register for securing the channel (CHANNELS_AVAILABLE register) which IRM provides.
FIG. 11 and FIG. 12 show the bit allotment of the BANDWIDTH_AVAILABLE register and the CHANNELS_AVAILABLE register respectively. These registers are allotted in the CSR space defined by ISO/IEC 13213 as a serial bus dependent register. The BANDWIDTH_AVAILABLE register is a register of 32 bits (corresponding to 1 quadlet) as shown in FIG. 11, the upper 19 bits are the reserved field, and lower 13 bits (bw_remaining) have significance. bw_remaining shows the isochronous bandwidth which can be allocated at the present time, and the initial value is 1001100110011b (corresponding to 4915d). The time to transmit and perform 1 quadlet with 1572.864 Mbps is defined as 1, and 125 .mu.sec corresponds to 6144d. The time which can be allotted for the isochronous transmission is about 100 .mu.sec, and it corresponds to a default value of 4915d. "b" fixed to the end of the figure indicates that the figure is the binary number and "d" indicates that the figure is the decimal number. It is necessary to rewrite the value of this register to start to perform the isochronous transmission. For instance, if 10 .mu.sec of 125 .mu.sec is required to be allotted to the isochronous transmission, 10 .mu.sec corresponds to 492d, therefore, bandwidth is secured by rewriting the value of the register bw_remaining as 4423d (1000101000111b) (it is calculated as 4915d-492d=4423d).
Moreover, it is necessary to perform securing the transmission channel to perform the isochronous transmission. Securing the transmission channel is performed by using the CHANNELS_AVAILABLE register shown in FIG. 12. This register is composed of 64 bits (corresponding to 2 quadlet), the upper 32 bits are defined as channels_available_hi and the lower 32 bits are defined as channels_available_lo. The isochronous channel of IEEE 1394,64 of the 0th channel to the 63rd channels in total is available. The initial value of the CHANNELS_AVAILABLE register is 1111111111111111111111111111111111111111111111111111111111111111b, and it indicates that all 64 channels are unused and available. For instance, in order to secure the first channel, the value of the CHANNELS_AVAILABLE register is rewritten as 1111111111111111111111111111111111111111111111111111111111111101b. That is, each bit indicates the use of the channel of 0 to 63, and 1 is defined as used channel, 0 is defined as an unused channel.
In order to perform the isochronous transmission, the transmission bandwidth (corresponding to 125 .mu.sec) and the transmission channel are secured by setting of the BANDWIDTH_AVAILABLE register and the CHANNELS_AVAILABLE register, then the cycle start packet is transmitted as shown in FIG. 13(a), afterward the isochronous packet is transmitted after a gap time which is called an isochronous gap. In FIG. 13(a), 12 indicates the period which is called a bus arbitration period, two or more nodes request the packet transmission to one bus at the same time, only one node can acquire the authority for the packet transmission. 13 indicates a period which is called a data prefix period, or the period after which the packet is immediately transmitted. 14 indicates isochronous packet period, or the period for which the transmission data is transmitted. 15 indicates a period which is called the data end, it indicates that the transmission of the packet is ended. As shown in FIG. 13(b), the period in which the isochronous packet can be transmitted is about 100 .mu.sec after the cycle start, or the period for which the packet of two or more channels can be transmitted.
As shown in FIG. 10, in this case, the second digital VCR is an IRM, the BANDWIDTH_AVAILABLE register and the CHANNELS_AVAILABLE register are available to IEEE 1394 serial bus 5. When the digital data of the first digital VCR is transmitted to the second digital VCR using the isochronous transmission, the data transmission (dubbing) is started after securing the transmission bandwidth and the transmission channel by the above-mentioned procedure. For instance, the first digital VCR and the second digital VCR are equipped with a physical layer which has the transmission ability of S100 (it is the transmission standard of 98.304 Mbps in the IEEE 1394). When the bandwidth of 40 Mbps is transmitted by the channel 0, 40 Mbps corresponds to 2500d, isochronous transmission is started with rewriting the value of bw_remaining as 0100101101111 (because4915d-2500d=2415d=0100101101111), and the 0th bit of the channels_available_lo as 0b.
However, the above mentioned conventional serial bus control apparatus can only secure the current transmission bandwidth and the current transmission channel. There is no concept for time reservation of the transmission bandwidth and transmission channel. Therefore, when it is necessary to use the bus at certain period in future, it is not sure that the required transmission bandwidth and transmission channel is available or not.
Because of this, there are inconveniences in the serial bus control apparatus. For instance, when recording a program from the set top box connected with the bus to the digital VCR at certain time in the future with reservation by the timer, and if other nodes occupied the bus at the reserved time, the reserved recording by the timer can not be performed.